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2.1DMC-1580 硬件规划
FPGA选用的是Xilinx公司的100万门FPGA芯片XC3S1000,其配备芯片为Xilinx公司的4 MB容量PROM芯片XCF04S,以主动串行办法对FPGA进行上电配备。AD、DA分别为ADI公司12位105 MS/s高速模/数变换芯片AD9432与14位105 MS/s高速数/模变换芯片AD9764。SRAM选用Cypress公司的256k×16 bit SRA。
M芯片CY7C1041用于对数据进行大容量缓存,以满足USB的传输需求。USB控制器选用Cypress公司的 EZ-USB FX2系列USB2.0芯片CY7C68013,封装为PQFP128。它支撑USB2.0高速传送,高速率可达480 Mb/s。系统框图如图2所示。
2.2 DMC-1580程序规划
FPGA程序包含雷达信号仿照模块、雷达信号搜集与传输控制模块和SDK中Microblaze的控制与参数传递模块。雷达信号仿照模块结束对雷达中频/视频和杂波信号的仿照,为雷达的接收系统和信号搜集模块供应自检查验信号。雷达信号搜集与传输控制模块结束对雷达中频/视频信号的搜集与传输控制,该模块为系统实在回波的仿照供应了实测数据。参数的传递由两部分组成:上位机的信号参数输入或信号仿照系统自带的键盘扫描输入与 Microblaze核之间的参数传递;Microblaze将对应的输入参数通过接连调用的办法传递给信号或杂波发作模块。在ISE 9.1环境下通过VHDL硬件言语发作脉冲、LFM等信号,运用EDK 9.1的附件将在ISE 9.1中发作的信号模块转化为对应的IP核 [8]。在EDK开发中,可以将在ISE中发作的信号仿照的IP核直接添加到工程中,IP核和Microblaze处理器之间通过OPB总线结束信号参数和接连信号的传递,使整个开发进程模块化。根据FPGA的嵌入式系统规划的EDK开发中有硬件模块规划和软件控制2个部分,使整个系统兼容了FPGA并行处理的高速率和软件编程的简练。
2.3 DMC-1580驱动程序规划与运用
FX2的设备驱动程序有2种:一种用来在设备接入时从主机下载固件到RAM中,称为固件下载驱动程序(wdgtldr.sys);另一种是在设备从头罗列后加载的通用设备驱动程序(ezusb.sys),应用软件通过该设备驱动程序与FX2通讯[9]。
固件下载驱动程序(wdgtldr.sys)是运用Cypress公司供应的固件下载驱动程序源代码和用户编译成功的固件代码,在Win2000 DDK中创建的。在将固件代码下载到RAM中后,系统铲除内存中的固件下载驱动程序,并进行从头罗列,让8051固件控制FX2。此刻,系统取得由 8051固件供应的新的ID号,认为有新的USB设备接入,并据此加载相应的通用设备驱动程序。通用设备驱动程序一般不需求从头编写,可以直接运用 Cypress公司现已编好的驱动程序ezusb.sys。
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